Design and Implementation of High Speed IIR and FIR Filter using Pipelining
نویسنده
چکیده
The FIR & IIR Filters are being designed using HDL languages since speed is among the chief interest in this era; the main objective is to enhance the speed of the system. In the whole system if the speed of the individual block is enhanced the overall speed of the system is enhanced digital computer arithmetic is an aspect of logic design with the objective of developing appropriate algorithms in order to attain an effective utilization of the available hardware. Since ultimately, speed, power and chip area are the most often used measures of the efficiency of an algorithm, there has a strong link between the algorithms and technology applied for its implementation. Here it is done by applying the technique pipelining. The comparative analysis of pipelined & non-pipelined FIR and IIR filters is performed by using different FPGA’s. The results reveal that the implemented filters turn in a consistent quality of output.
منابع مشابه
Design of IIR Digital Filter using Modified Chaotic Orthogonal Imperialist Competitive Algorithm (RESEARCH NOTE)
There are two types of digital filters including Infinite Impulse Response (IIR) and Finite Impulse Response (FIR). IIR filters attract more attention as they can decrease the filter order significantly compared to FIR filters. Owing to multi-modal error surface, simple powerful optimization techniques should be utilized in designing IIR digital filters to avoid local minimum. Imperialist compe...
متن کاملVLSI Implementation of Pipelined FIR Filter
This paper proposes to optimize the system speed with minimal cost and hardware by making use of pipelining approach in the designing of FIR filter. The nonpipelined and pipelined FIR filter has been designed using Hardware Description Language (HDL) and a comparative study of both the filter designs using Radix-4 & Radix-8 has been done. The design synthesis and power analysis are carried out ...
متن کاملA Novel Approach of Area-Efficient FIR Filter Design Using Distributed Arithmetic with Decomposed LUT
Abstract: In this paper, a highly area-efficient multiplier-less FIR filter is presented. Distributed Arithmetic (DA) has been used to implement a bit-serial scheme of a general asymmetric version of an FIR filter, taking optimal advantage of the 3-input LUT-based structure of FPGAs. The implementation of FIR filters on FPGA based on traditional arithmetic method costs considerable hardware res...
متن کاملMultidimensional IIR filters and robust rational interpolation
It is well-known that IIR filters can have a much lower order than FIR filters with the same performance. On the downside is that the implementation of an IIR filter is an iterative procedure while that of an FIR filter is a one-shot computation. But in higher dimensions IIR filters are definitely more attractive. We offer a technique where the filter’s performance specifications, stability con...
متن کاملEfficient Filter Designfor LoudspeakerEqualization*
The advent of digital storage of audio signals and the availability of high-speed digital signal processing devices facilitate the implementation of high-order filter functions for loudspeaker equalization. A method is presented for generating a digital model of a loudspeaker system from which an efficient compensation filter using an IIR structure is derived. Application of this technique allo...
متن کامل